A PLD is a semiconductor integrated circuit that contains logic circuitry that can be programmed to perform a host of logic functions. Such programming may be accomplished by loading onto the PLD a configuration image file (or “bitstream”).
An example of a PLD that may benefit from the presently disclosed techniques include a field programmable gate array (FPGA) and, particularly an FPGA integrated in a higher level assembly such as an electrical circuit that includes an embedded processor and various hardware and software elements in addition to the FPGA.
On such a higher level assembly, it is desirable to facilitate loading a configuration image file bitstream previously designed by a first party onto the FPGA by a second party who may be unrelated to the first party. For example, a developer of the electrical circuit, or a product incorporating the circuit, may wish to load an FPGA configuration image file prepared by an unrelated FPGA designer. Such an FPGA configuration image file may be referred to as a “target image file”. The target image file may be available for downloading over the Internet, for example onto the FPGA device and may have been prepared to be compatible with a discrete number of different electrical circuit designs.
The circuit developer, however, may be unable to efficiently or reliably verify whether the target image file is compatible with the specific electrical circuit design within which the developer intends the target image file to operate.
Computer-aided design tools exist to facilitate design of a custom configuration image file to be implemented on a PLD. However, existing tools have limited abilities to assist the design of a higher level assembly electrical circuit, particularly where it is desired to use a previously prepared configuration image file.
Improved techniques for assuring compatibility between electrical circuits incorporating PLDs, embedded processors, and other hardware and software components, on the one hand, and a target configuration image file, on the other, are therefore desirable.